Embedded Systems Programming Course

Rabbit 2000 Features

Introduction

The Rabbit 2000 processor was designed as a clone of the popular Zilog Z180 processor, but with expanded capabilities. It is both a powerful and inexpensive processor, designed for embedded systems use. It has a total of 80 pins, with 20 lines used as address bus and an 8 lines used as the data bus. Other pins are used to connect to various external components. Some of the pins are used for accessing RAM and ROM, while others are used as interrupt signals or slave processor control pins.

The Rabbit 2000 requires two crystals in order to operate. The main crystal is used to run the Rabbit at a wide range of speeds, ranging from 1.8 MHz up to 30 MHz, depending on the oscillation frequency of the crystal used. The Rabbit can also double the crystal clock to run twice as fast, although the overall maximum speed the processor supports is about 30 MHz. It also supports dividing the clock by a factor of 8, which provides for reduced power usage. Yes, the processor can both double and divide by 8 for divide by 4 operations also. The second crystal must oscillate at 32 KHz, which is used mainly for running the real-time clock at a known, fixed frequency. The processor can be operated by the 32 KHz clock, in which case the main crystal is powered down, for an ultra low power mode. In this mode the processor itself may only use about 25 ?A of current and much of the external circuitry, like the high frequency clock is turned off. It is capable of being run using 5, 3.3 or 2.7-volt power sources, although high frequency operations normally require the higher voltage supplies.

The Rabbit processor supports at least 1 MB of memory directly and can even go beyond this by using some of its parallel port lines as chip select lines. It has built-in support for using both static RAM and flash RAM. Most memory devices can be directly connected to the Rabbit data and address bus, without needing any additional buffering or control chips. This is called glueless chip technology. It saves money by eliminating the chips needed to act as buffers between the processor and RAM chips in many other designs.

When it comes to input and output the Rabbit really shines. It has total of 40 I/O pins that are normally used as 5 parallel ports. Some of the parallel ports can be reconfigured to operate as serial ports, which compliment the included 4, dedicated serial ports. Each serial port can operate at a wide range of baud settings, with 7, 8 and 9-bit protocol support. Serial ports A and B can also be operated in synchronous mode. One of the ports can even be setup to interconnect two Rabbit processors together with one acting as a master unit and the other a slave. Internally, the Rabbit has 2 general-purpose timer registers, a separate watchdog timer and a 48-bit wide real time clock for precise time requirements.

The Rabbit is designed to easily support downloading and storing programs in memory. A very short program stored in internal ROM scans a special programming port upon reset or power up. This bit of code reads 3 bytes of data from the port in each pass. The first two bytes received form an address that the third byte is saved to. Once the values 0x80, 0x24, and 0x80 are received, the ROM routine exits and the processor runs the code found at memory location 0x0000. This first bit of code runs at 2400 baud always.

Normally, the code downloaded during the initial bootstrap is stored to memory location 0x0000. This section could be the entire program, but more likely it is a small helper program that switches the port into high-speed mode, 19.2 K to 115.2 K baud, and then downloads the real program and writes it into Flash RAM. There are many ways to implement the bootstrap, but generally the code will be downloaded and stored in the Flash RAM. Later when the unit is powered up, without the programming cable being attached, the processor will immediately execute the program stored in the Flash RAM chips. This is the normal mode of operation when this processor is used in an embedded system.

This processor has a large number of internal registers. There are sixteen 8-bit registers called A, B, C, D, E, F, H and L. The other eight registers are known as A', B', C', D', E', F', H' and L'. All the secondary registers can be swapped quickly with the primary registers and are very useful for holding temporary values. The F register is a flags register than cannot be directly modified. Instead it is used to store status information about the last instruction that was executed. For example, when subtracting a number from the A register, the 'zero' bit in the flag register will be set if A is equal to zero after the operation completes.

Two 8-bit registers can be combined to form a 16-bit wide register. Pairing is done as AF, BC, DE and HL. There are also 4 general-purpose 16-bit registers called IX, IY, SP and PC. IX and IY are designed for usage as an index to data arrays mostly. The SP register is used to control the stack pointer and the PC register tracks program execution.

There are also 4 extra registers designed for special purposes. The IP register gives the programmer the ability to assign priorities to interrupts. Two bits are used for each interrupt, for a total of 4 different priority levels. The IIR and EIR registers are used for internal and external interrupt handling.

Lastly, there are 3 registers that are used to combine with 16-bit addresses to form full 24-bit addresses. The DATASEG and STACKSEG registers hold a special value that indicates where in memory the data and stack segments are located. Each segment is limited to accessing 64KB of data at any given moment, but the segment registers can be changed as needed to access all memory available. Generally, most software will not need more than 64KB of combined data and stack space. If it is needed, then the programmer must take special steps to address memory beyond this.

On the other hand, exceeding 64KB of program code is quite common. For this reason, the processor also includes one additional segment register called the XPC register. This register is used to setup a sliding window in a special 8K region of memory. Normally the XPC and PC registers combine to form the real 24-bit address of the next instruction to be executed. If the processor notices that the PC register ever gets close to the end of the 8K window, the XPC register is automatically adjusted to point to the next 4K block of code in flash or static RAM. This technique is known as memory mapping and we will discuss it in more detail below.

Memory Organization

Memory usage in the Rabbit 2000 is similar to the way the original Z80 used memory, with a couple of very important enhancements. The Z80 used 16-bit addresses, which provide for up to 64K of memory. 16-bit addresses have a tremendous advantage over 32-bit addresses, since they use up half the space to store and use. 64K of memory is quite limiting however, so the Rabbit actually supports 24-bit wide addresses. This allows the processor to use up to 1 MB of memory, without needing any extra support chips.

In order to use all this memory however, a 16-bit address must be combined with a special 8-bit segment address to create a true 24-bit address. Since the XPC address area is 8K in size, all functions that are downloaded to the Rabbit must fit within an 8K block. More than one function may occur in the 8K block, and if this happens, then only 16-bit addresses are used to call or jump to routines in the same 8K block. When calling functions that are outside the current 8K block, a new XPC segment must be loaded to switch to the new 8K block where the function resides. Luckily for us, the compiler will track and handle this automatically. The net result is that the Rabbit can handle a program of up to 1 MB in size and still have almost 64K of data available for variables and such. Please note that constants, like error message strings, are normally stored in the same area as the code, so as to not waste the 64K of data area.

While this may seem strange at first, it is the same technique that has been successfully used for years in other processors like the 8088, Z80, 80186, and even their bigger, faster cousins the 80286, 80386, and Pentium, when operating in real mode. Of course, the bigger processors like the Pentium also support a mode of operation where everything is 32-bit wide, which allows accessing up to 4GB of RAM. This is overkill for most embedded systems and the Rabbit's design is much cheaper overall and normally does not limit its usefulness.

Input/Output Registers

The parallel ports A through E are available as 8-bit wide data registers. Most of the ports bits can be used as either input or output pins, depending on the setting in a control register. The parallel port registers are as follows:

There are four serial ports available as 8-bit wide data registers. The serial ports can be operated at speeds of up to 1/32 of the main clock frequency, when used in an asynchronous mode. When used in synchronous mode, the ports can be operated at up to ¼ of the main clock frequency. Each has an associated status register that is used to control serial data input and output timing. The serial port registers are as follows:

The Rabbit 2000 processor also has two general-purpose timer registers. Timer A is normally used as clock generators for the serial ports, while Timer B is normally available for any other timing operations needed.

Timer A is really 4 different timers in one that support creating up to 4 different baud rate settings, one for each serial port, by loading a divisor constant into a control register. The peripheral clock divided by 2 is connected as the input to the timer. As each clock pulse is received, the timer compares the current clock count to a constant value, one for each of 5 different registers. If the count in a counter register matches the value stored in the corresponding constant register, the timer then generates an interrupt. This interrupt signals the CPU which then knows that the time is correct for sending or receiving additional data via the serial port. The Rabbit processor supports 3 different interrupt priorities and the timer can be setup to generate interrupts with priority 1, 2 or 3. Please note that if you do not need serial communications, you can use the interrupts to act as signals for any kind of periodic processing.

Timer B on the other hand can be used for any purpose desired. It uses a 10-bit wide count and 2 10-bit wide match registers to allow for longer timing intervals. This is done by combining 8 bits from one register with 2 more bits from a second register for both the counting and matching registers. Timer B also generates an interrupt, configurable for priorities 1, 2 or 3, whenever the count register matches one of the match registers. Timer B can be driven from the same peripheral clock divided by 2 as Timer A, or it can be driven by the peripheral clock divided by 16, or it can be driven by Timer A's output.

The Rabbit 2000 processor also has a real-time clock that can be used for more precise timing operations. This clock is a free-running 48-bit counter, which makes it large enough to count up for about 100 years. The 32 KHz clock always drives the real-time clock. If the backup battery is installed, the real-time clock continues to run when main power is removed. It can be reset to zero or disabled if not needed.

The Rabbit 2000 processor has one additional timer we must discuss. It is called the watchdog timer and its purpose is to detect when the current program has locked up or crashed. When enabled, the processor periodically checks the watchdog timer to determine if it matches a timeout value. If the watchdog timer does reach this value, the processor assumes the program has crashed or locked up in some way and the processor resets itself, which has the effect of doing a reboot. The program that is running is responsible for periodically resetting the watchdog timer before the timeout is reached. The timeout can be programmed to occur in 2, 1, 0.5 or 0.25 seconds, depending on the needs of the application.

Rabbit Pin Description

Rabbit Internal Registers